1. Field or the Invention
The present invention relates to a prober apparatus, in particular, for testing electric characteristics of chips formed on a semiconductor wafer.
2. Description of the Related Art
In a process of manufacturing semiconductor devices, the electric characteristics of the devices are tested within a wafer after the completion of each processing step and before the start of an assembling step. This test is called a wafer test, by which undesirable devices are detected and, if necessary are rejected. The apparatus for this test is called a wafer prober.
A wafer test system for performing the above-mentioned test basically comprises two units, that is, a tester and a wafer prober which are connected by a measuring line. In response to a TEST START command from a test controlling line, the wafer prober automatically impresses marks on defective chips in accordance with a TEST COMPLETE signal or a FAIL signal. In this manner, other chips are sequentially probed. The tester receives a WAFER END signal from the prober and automatically performs a test for one wafer. Also, it collects test data and performs a processing for one lot in response to a CARRIER END signal from the wafer prober.
A wafer prober, in which a test head of a tester is mounted on a head plate of the wafer prober (so-called HF type), is well known. See U.S. Pat. Nos. 3,493,858 and 3,866,119 and Japanese Patent Disclosure Nos. 58-209134, 59-72148 and 61-43854. This type of wafer prober will now be described with reference to FIG. 1.
As shown in FIG. 1, insert ring 2 is mounted in head plate 1. Contact board 3 is disposed on the upper surface of insert ring 2. Card socket 4 is attached on the lower surface of insert ring 2. Contact board 3 and card socket 4 are connected by cable 5. Probe card 6 is attached to card socket by pogo-pin or socket 7. High-frequency test head 8 arranged above head plate 1 has performance board 9 on its lower surface. Performance board 9 and contact board 3 are connected by pogo-pin 10. Mounting table (chuck top) 11, on which wafer 12 is mounted, is arranged below probe card 6. The horizontal angle adjustment (.theta. adjustment) between needles 6a of probe card 6 and bonding pads of each chip of wafer 12 is performed by .theta. rotation mechanism 13 connected to insert ring 2.
In the above wafer prober, performance board 9 and probe card 6 are electrically connected through pogo-pin 10, contact board 3, cable 5, card socket 4 and pogo-pin 7. Thus, the connection path is long. In addition, .theta. rotation mechanism 13 is connected to insert ring 2 for positioning each after exchange of probe cads. This renders a head plate/insert ring section necessary to have a thickness of about 50 mm. Under the circumstances, the length of the connection path between probe card 6 and performance board 8 is very long, that is, about 80 mm.
In view of the precision of the test, as the length of the connection path between performance board 9 and probe card 6 becomes large, the electric characteristics of the prober itself is degraded by a problem in measuring timing or an increase in a capacitive load, and test precision is lowered. It is thus possible that the characteristics of the semiconductor chip measured by the prober is judged to be inferior to the actual characteristics thereof. In addition, since the length of the connection path is large, even if a test head has the performance of generating a high-frequency signal of, for example, 20 MHz, effective signal level may be lowered to 10 to 15 MHz due to properties of the probe card. Even if a 100 MHz test head is used, effective signal level at the probe card may be lowered to 70 to 80 MHz.